The present invention is related to a semiconductor device, a method for manufacturing the semiconductor device, and an electronic device that includes the semiconductor device.
For minimizing the size and/or maximizing the functionality of an electronic device, sizes of semiconductor devices included in the electronic device may need to be minimized. Nevertheless, in reducing the size of a semiconductor device, e.g., a metal-oxide-semiconductor field-effect transistor (MOSFET), mitigation of undesirable short-channel effects may be substantially difficult because of factors such as those related to the gate oxide thickness and the supply voltage.
One or more ultra-shallow junctions may be implemented for alleviating short-channel effects in a MOSFET. Nevertheless, implementation of ultra-shallow junctions may increase difficulty in minimizing undesirable drain junction capacitance and junction leakage, especially for an N-type metal-oxide-semiconductor (NMOS) device with two-step source/drain implantation.
For mitigating the aforementioned issues, in a semiconductor device, embedded silicon-germanium (SiGe) or silicon carbide (SiC) layers may be implemented in a semiconductor substrate at two sides of a gate electrode. Nevertheless, the process of forming the SiGe or SiC layers may cause undesirable damage to elements or structures of the semiconductor device. As a result, performance of the semiconductor device related to drain-induced barrier lowering and off-state current may be undesirable.